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? 2010 microchip technology inc. ds22269a-page 1 mcp65r41/6 features ? factory set reference voltage - available voltage: 1.21v and 2.4v - tolerance: 1% (typical) ? low quiescent current: 2.5 a (typical) ? propagation delay: 4 s with 100 mv overdrive ? input offset voltage: 3mv (typical) ? rail-to-rail input: v ss - 0.3v to v dd + 0.3v ? output options: - mcp65r41 ? push-pull - mcp65r46 ?? open-drain ? wide supply voltage range: 1.8v to 5.5v ? packages: sot23-6 typical applications ? laptop computers ? mobile phones ? hand-held metering systems ? hand-held electronics ? rc timers ? alarm and monitoring circuits ? window comparators design aids ? microchip advanced part selector (maps) ? analog demonstration and evaluation boards typical application description the microchip technology inc. mcp65r41/6 family of push-pull and open-drain output comparators are offered with integrated reference voltages of 1.21v and 2.4v. this family provides 1% (typical) tolerance while consuming 2.5 a (typical) current. these comparators operate with a single-supply voltage as low as 1.8v to 5.5v, which makes them ideal for low cost and/or battery powered applications. these comparators are optimized for low power, single-supply applications with greater than rail-to-rail input operation. the output limits supply current surges and dynamic power consumption while switching. the internal input hysteresis eliminates output switching due to internal noise voltage, reducing current draw. the mcp65r41 output interfaces to cmos/ttl logic. the open-drain output device mcp65r46 can be used as a level-shifter from 1.6v to 10v using a pull-up resistor. it can also be used as a wired-or logic. this family of devices is available with 6 lead sot-23 package. package types v out v dd r 2 r f r 3 v ref v pu r pu * * pull-up resistor required for the mcp65r46 only. r 4 thermistor v ref over temperature alert 6 4 sot23-6 mcp65r41/6 1 2 3 - + 5 out v ss +in v dd v ref -in 3 a comparator with integrated reference voltage
mcp65r41/6 ds22269a-page 2 ? 2010 microchip technology inc. notes:
? 2010 microchip technology inc. ds22269a-page 3 mcp65r41/6 1.0 electrical characteristics 1.1 absolute maximum ratings? v dd - v ss ....................................................................... 7.0v all other inputs and outputs...........v ss ? 0.3v to v dd + 0.3v difference input voltage ......................................|v dd - v ss | output short circuit current .................................... 25 ma current at input pins .................................................. 2 ma current at output and supply pins .......................... 50 ma storage temperature ................................... -65c to +150c ambient temperature with power applied.... -40c to +125c junction temperature ................................................ +150c esd protection on all pins (hbm/mm) ???????????????????? 4 kv/200v esd protection on mcp65r46 out pin (hbm/mm)............. ??????????????????????????????????????????????????????????????? ??????????????????????? 4 kv/175v ?notice: stresses above those listed under ?maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. dc characteristics unless otherwise indicated, all limits are specified for: v dd = +1.8v to +5.5v, v ss = gnd, t a = +25c, v in+ = v dd /2, v in- = v ss , r l = 100 k ? to v dd /2 ( mcp65r41 only), and r pull-up = 2.74 k ? to v dd ( mcp65r46 only), and t a = -40c to 125c. parameters sym min typ max units conditions power supply supply voltage v dd 1.8 ? 5.5 v quiescent current per comparator i q ?2.5 4 ai out = 0 input input voltage range v cmr v ss ? 0.3 ? v dd +0.3 v common-mode rejection ratio v dd = 5v cmrr 55 70 ? db v cm = -0.3v to 5.3v 50 65 ? db v cm = 2.5v to 5.3v 55 70 ? db mcp65r41 , v cm = -0.3v to 2.5v 50 70 ? db mcp65r46 , v cm = -0.3v to 2.5v power supply rejection ratio psrr 63 80 ? db v cm = v ss input offset voltage v os -10 3 +10 mv v cm = v ss ( note 1 ) drift with temperature ? v os / ? t ? 10 ? v/c v cm = v ss input hysteresis voltage v hyst 13.3 5 mvv cm = v ss ( note 1 ) drift with temperature ? v hyst / ? t ? 6 ? v/c v cm = v ss drift with temperature ? v hyst / ? t 2 ? 5 ?v/c 2 v cm = v ss input bias current i b ?1 ?pav cm = v ss t a = +85c i b ?50 ? pav cm = v ss t a = +125c i b ? ? 5000 pa v cm = v ss input offset current i os ? 1 ? pav cm = v ss note 1: the input offset voltage is the center (average) of the input-referred trip points. the input hysteresis is the difference between the input-referred trip points. 2: limit the output current to absolute maximum rating of 30 ma. 3: do not short the output of the mcp65r46 comparators above v ss + 10v. 4: the low power reference voltage pin is designed to drive small capacitive loads. see section 4.5.2 .
mcp65r41/6 ds22269a-page 4 ? 2010 microchip technology inc. common mode/ differential input impedance z cm /z diff ?10 13 ||4 ? ? ||pf push pull output high level output voltage v oh v dd ? 0.2 ? ? v i out = -2 ma, v dd = 5v low level output voltage v ol ??v ss +0.2 v i out = 2 ma, v dd = 5v short circuit current i sc ?50 ? ma( note 2 ) mcp65r41 i sc ?1.5 ? ma( note 2 ) mcp65r46 open drain output (mcp65r46) low level output voltage v ol ??v ss +0.2 v i out = 2 ma short circuit current i sc ?50 ? ma high-level output current i oh -100 ? ? na v pu = 10v pull-up voltage v pu 1.6 ? 10 v note 3 output pin capacitance c out ?8 ?pf reference voltage output initial reference tolerance v tol -2 1 +2 % i ref = 0a, v ref = 1.21v and 2.4v v ref 1.185 1.21 1.234 v i ref = 0a 2.352 2.4 2.448 v reference output current i ref ? 500 ? a v tol = 2% (maximum) drift with temperature (character- ized but not production tested) ? v ref / ? t ? 27 100 ppm v ref = 1.21v, v dd = 1.8v ?22100ppmv ref = 1.21v, v dd = 5.5v ?23100ppmv ref = 2.4v, v dd = 5.5v capacitive load c l ?200 ? pf note 4 dc characteristics (continued) unless otherwise indicated, all limits are specified for: v dd = +1.8v to +5.5v, v ss = gnd, t a = +25c, v in+ = v dd /2, v in- = v ss , r l = 100 k ? to v dd /2 ( mcp65r41 only), and r pull-up = 2.74 k ? to v dd ( mcp65r46 only), and t a = -40c to 125c. parameters sym min typ max units conditions note 1: the input offset voltage is the center (average) of the input-referred trip points. the input hysteresis is the difference between the input-referred trip points. 2: limit the output current to absolute maximum rating of 30 ma. 3: do not short the output of the mcp65r46 comparators above v ss + 10v. 4: the low power reference voltage pin is designed to drive small capacitive loads. see section 4.5.2 .
? 2010 microchip technology inc. ds22269a-page 5 mcp65r41/6 1.2 test circuit configuration figure 1-1: test circuit for the push-pull output comparators. figure 1-2: test circuit for the open drain comparators. ac characteristics unless otherwise indicated, all limits are specified for: v dd = +1.8v to +5.5v, v ss = gnd, t a = +25c, v in+ = v dd /2, step = 200 mv, overdrive = 100 mv, r l = 100 k ? to v dd /2 ( mcp65r41 only), r pull-up = 2.74 k ? to v dd ( mcp65r46 only), and c l = 50 pf. parameters sym min typ max units conditions rise time t r ?0.85? s fall time t f ?0.85? s propagation delay (high to low) t phl ?48.0s propagation delay (low to high) t plh ?48.0s propagation delay skew t pds ?0.2? s note 1 maximum toggle frequency f max ?160?khzv dd = 1.8v f max ?120?khzv dd = 5.5v input noise voltage e n ?200?v p-p 10 hz to 100 khz note 1: propagation delay skew is defined as: t pds = t plh - t phl . temperature specifications unless otherwise indicated, all limits are specified for: v dd = +1.8v to +5.5v and v ss = gnd. parameters symbo l min typ max units conditions temperature ranges specified temperature range t a -40 ? +125 c operating temperature range t a -40 ? +125 c storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, sot23-6 ? ja ? 190.5 ? c/w v out v dd mcp65r41 v in =v ss 200k 200k 200k 200k 50p v ss = 0v v out v dd mcp65r46 v in =v ss 200k 200k 2.74k 100k 50p v ss = 0v
mcp65r41/6 ds22269a-page 6 ? 2010 microchip technology inc. notes:
? 2010 microchip technology inc. ds22269a-page 7 mcp65r41/6 2.0 typical performance curves note: unless otherwise indicated, v dd = +1.8v to +5.5v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r l = 100 k ? to v dd /2 ( mcp65r41 only), r pull-up = 2.74 k ? to v dd /2 ( mcp65r46 only) and c l = 50 pf. figure 2-1: input offset voltage. figure 2-2: input offset voltage vs. temperature. figure 2-3: input offset voltage vs. common-mode input voltage. figure 2-4: input offset voltage drift. figure 2-5: input offset voltage vs. supply voltage vs. temperature. figure 2-6: input offset voltage vs. common-mode input voltage. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 0% 10% 20% 30% 40% 50% -10-8-6-4-2 0 2 4 6 810 v os (mv) occurrences (%) v dd = 1.8v v cm = v ss avg. = 1.09 mv stdev = 1.59 mv 850 units v dd = 5.5v v cm = v ss avg. = 0.61 mv stdev = 1.48 mv 850 units -10.0 -8.0 -6.0 -4.0 -2.0 0.0 2.0 4.0 6.0 8.0 10.0 -50 -25 0 25 50 75 100 125 temperature (c) v dd = 1.8v v dd = 5.5v v cm = v ss v os (mv) -10.0 -8.0 -6.0 -4.0 -2.0 0.0 2.0 4.0 6.0 8.0 10.0 -0.3 0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 v cm (v) v os (mv) v dd = 1.8v t a = +25c t a = +125c t a = +85c t a = -40c 0% 10% 20% 30% 40% 50% 60% -60 -48 -36 -24 -12 0 12 24 36 48 60 v os drift (v/c) occurrences (%) v cm = v ss avg. = 9.86 v/c stdev = 4.97 v/c 850 units t a = -40c to +125c -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 1.5 2.5 3.5 4.5 5.5 v dd (v) v os (mv) t a = -40c to +125c -10.0 -7.5 -5.0 -2.5 0.0 2.5 5.0 7.5 10.0 -1.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 v cm (v) v os (mv) t a = -40c to +125c v dd = 5.5v
mcp65r41/6 ds22269a-page 8 ? 2010 microchip technology inc. note: unless otherwise indicated, v dd = +1.8v to +5.5v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r l = 100 k ? to v dd /2 ( mcp65r41 only), r pull-up = 2.74 k ? to v dd /2 ( mcp65r46 only) and c l = 50 pf. figure 2-7: input hysteresis voltage at -40c. figure 2-8: input hysteresis voltage at +25c. figure 2-9: input hysteresis voltage at +125c. figure 2-10: input hysteresis voltage drift - linear temperature compensation (tc1). figure 2-11: input hysteresis voltage drift - quadratic temperature compensation (tc2). figure 2-12: input hysteresis voltage vs. temperature. 0% 5% 10% 15% 20% 25% 30% 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v hyst (mv) occurrences (%) v dd = 1.8v avg. = 2.4 mv stdev = 0.17 mv 850 units v dd = 5.5v avg. = 2.3 mv stdev = 0.17 mv 850 units t a = -40c 0% 5% 10% 15% 20% 25% 30% 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v hyst (mv) occurrences (%) v dd = 1.8v avg. = 3.0 mv stdev = 0.17 mv 850 units v dd = 5.5v avg. = 2.8 mv stdev = 0.17 mv 850 units t a = +25c 0% 5% 10% 15% 20% 25% 30% 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v hyst (mv) occurrences (%) v dd = 1.8v avg. = 3.4 mv stdev = 0.14 mv 850 units v dd = 5.5v avg. = 3.2 mv stdev = 0.13 mv 850 units t a = +125c 0% 10% 20% 30% 40% 50% 60% 70% 80% 0 2 4 6 8 10 12 14 16 18 20 v hyst drift, tc1 (v/c) occurrences (%) 850 units t a = -40c to +125c v cm = v ss v dd = 5.5v avg. = 5.7 v/c stdev = 0.50 v/c v dd = 1.8v avg. = 6.1 v/c stdev = 0.55 v/c 0% 10% 20% 30% -0.50 -0.25 0.00 0.25 0.50 0.75 1.00 v hyst drift, tc2 (v/c 2 ) occurrences (%) v dd = 5.5v v cm = v ss avg. = 10.4 v/c stdev = 0.6 v/c v dd = 5.5v avg. = 0.25 v/c 2 stdev = 0.1 v/c 2 v dd = 1.8v avg. = 0.3 v/c 2 stdev = 0.2 v/c 2 1380 units t a = -40c to +125c v cm = v ss 1.0 2.0 3.0 4.0 5.0 -50 -25 0 25 50 75 100 125 temperature (c) v hyst (mv) v dd = 5.5v v dd = 1.8v v cm = v ss
? 2010 microchip technology inc. ds22269a-page 9 mcp65r41/6 note: unless otherwise indicated, v dd = +1.8v to +5.5v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r l = 100 k ? to v dd /2 ( mcp65r41 only), r pull-up = 2.74 k ? to v dd /2 ( mcp65r46 only) and c l = 50 pf. figure 2-13: input hysteresis voltage vs. common-mode input voltage. figure 2-14: input hysteresis voltage vs. common-mode input voltage. figure 2-15: input hysteresis voltage vs. supply voltage vs. temperature. figure 2-16: quiescent current. figure 2-17: quiescent current vs. common-mode input voltage. figure 2-18: quiescent current vs. common-mode input voltage. 1.0 2.0 3.0 4.0 5.0 -0.3 0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 v cm (v) v hyst (mv) v dd = 1.8v t a = +125c t a = +85c t a = +25c t a = -40c 1.0 2.0 3.0 4.0 5.0 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 v cm (v) v hyst (mv) v dd = 5.5v t a = -40c t a = +25c t a = +85c t a = +125c 1.0 2.0 3.0 4.0 5.0 1.5 2.5 3.5 4.5 5.5 v dd (v) v hyst (mv) t a = -40c t a = +25c t a = +85c t a = +125c 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100% 0.01.02.03.04.05.0 i q (v/v) occurrences (%) v dd = 1.8v 850 units temp +125c avg. = 3.51 a stdev= 0.07 a temp +85c avg. = 3 a stdev= 0.07 a temp +25c avg. = 2.52 a stdev= 0.08 a temp -40c avg. = 1.93 a stdev= 0.08 a 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 v cm (v) i q (a) v dd = 1.8v sweep v in - ,v in+ = sweep v in+ ,v in - = v dd /2 sweep v in - ,v in+ = v dd /2 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 -1.00.01.02.03.04.05.06.0 v cm (v) i q (a) v dd = 5.5v sweep v in - ,v in+ = v dd /2 sweep v in+ ,v in- = v dd /2
mcp65r41/6 ds22269a-page 10 ? 2010 microchip technology inc. note: unless otherwise indicated, v dd = +1.8v to +5.5v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r l = 100 k ? to v dd /2 ( mcp65r41 only), r pull-up = 2.74 k ? to v dd /2 ( mcp65r46 only) and c l = 50 pf. figure 2-19: quiescent current vs. supply voltage vs. temperature. figure 2-20: quiescent current vs. toggle frequency. figure 2-21: short circuit current vs. supply voltage vs. temperature. figure 2-22: quiescent current vs. common-mode input voltage. figure 2-23: quiescent current vs. pull up voltage. figure 2-24: no phase reversal. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0.0 1.0 2.0 3.0 4.0 5.0 6.0 v dd (v) i q (a) t a = -40c t a = +25c t a = +85c t a = +125c 0 2 4 6 8 10 12 14 16 18 10 100 1000 10000 100000 toggle frequency (hz) i q (a) v dd = 5.5v v dd = 1.8v 10 100 1k 10k 100k 100 mv over-drive v cm = v dd /2 r l = open 0 db output attenuation -120 -80 -40 0 40 80 120 0.0 1.0 2.0 3.0 4.0 5.0 6.0 v dd (v) i sc (ma) t a = -40c t a = +85c t a = +25c t a = +125c t a = -40c t a = +85c t a = +25c 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 -1.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 v cm (v) i q (ma) v dd = 5.5v sweep v in+ ,v in - = v dd /2 sweep v in - ,v in+ = v dd /2 mcp65r46 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 012345678910 v pu (v) i q (a) v dd = 2.5v v dd = 1.8v v dd = 5.5v v dd = 4.5v v dd = 3.5v mcp65r46 -1.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 time (3 s/div) v out (v) v in - v out v dd = 5.5v v in + = v dd /2
? 2010 microchip technology inc. ds22269a-page 11 mcp65r41/6 note: unless otherwise indicated, v dd = +1.8v to +5.5v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r l = 100 k ? to v dd /2 ( mcp65r41 only), r pull-up = 2.74 k ? to v dd /2 ( mcp65r46 only) and c l = 50 pf. figure 2-25: output headroom vs. output current. figure 2-26: low-to-high and high-to-low propagation delays. figure 2-27: low-to-high and high-to-low propagation delays. figure 2-28: output headroom vs. output current. figure 2-29: low-to-high and high-to-low propagation delays. figure 2-30: low-to-high and high-to-low propagation delays . 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.0 2.0 4.0 6.0 8.0 10.0 i out (ma) v ol , v dd - v oh (v) v dd = 1.8v v dd - v oh t a = +125c t a = -40c v ol t a = +125c t a = -40c 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100% 012345678910 prop. delay (s) occurrences (%) v dd = 1.8v 100 mv over-drive v cm = v dd /2 t plh avg. = 3.92 s stdev= 0.45 s 850 units t phl avg. = 3.53 s stdev= 0.27 s 850 units mcp65r41 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100% 012345678910 prop. delay (s) occurrences (%) v dd = 5.5v 100 mv over-drive v cm = v dd /2 t phl avg. = 4.76 s stdev = 0.38 s 850 units t plh avg. = 4.97 s stdev = 0.41 s 850 units mcp65r41 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 5 10 15 20 25 i out (ma) v ol , v dd - v oh (v) v dd = 5.5v v ol t a = +125c t a = -40c v dd - v oh t a = +125c t a = -40c 0% 10% 20% 30% 40% 50% 60% 70% 80% 012345678910 prop. delay (s) occurrences (%) v dd = 1.8v 100 mv over-drive v cm = v dd /2 t plh avg. = 2.5 s stdev= 0.15 s 850 units t phl avg. = 3.6 s stdev= 0.19 s 850 units mcp65r46 0% 10% 20% 30% 40% 50% 60% 70% 80% 012345678910 prop. delay (s) occurrences (%) v dd = 5.5v 100 mv over-drive v cm = v dd /2 t plh avg. = 3.1 s stdev = 0.16 s 850 units t phl avg. = 4.9 s stdev = 0.26 s 850 units mcp65r46
mcp65r41/6 ds22269a-page 12 ? 2010 microchip technology inc. note: unless otherwise indicated, v dd = +1.8v to +5.5v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r l = 100 k ? to v dd /2 ( mcp65r41 only), r pull-up = 2.74 k ? to v dd /2 ( mcp65r46 only) and c l = 50 pf. figure 2-31: propagation delay vs. common-mode input voltage. figure 2-32: propagation delay vs. common-mode input voltage. figure 2-33: propagation delay vs. supply voltage. figure 2-34: propagation delay vs. common-mode input voltage. figure 2-35: propagation delay vs. common-mode input voltage. figure 2-36: propagation delay vs. supply voltage. 0 1 2 3 4 5 6 7 8 0.00 0.50 1.00 1.50 2.00 v cm (v) prop. delay (ns) t plh t phl v dd = 1.8v 100 mv over- di mcp65r41 prop. delay (s) 0 1 2 3 4 5 6 7 8 0.01.02.03.04.05.06.0 v cm (v) prop. delay (ns) t plh t phl v dd = 5.5v 100 mv over-drive mcp65r41 prop. delay (s) 0 4 8 12 16 20 1.5 2.5 3.5 4.5 5.5 v dd (v) prop. delay (ns) t phl , 10 mv over-drive t plh , 10 mv over-drive t phl , 100 mv over-drive t plh , 100 mv over-drive v cm = v dd /2 mcp65r41 prop. delay (s) 0 1 2 3 4 5 6 7 8 0.0 0.5 1.0 1.5 2.0 v cm (v) prop. delay (ns) t plh t phl v dd = 1.8v 100 mv over-drive mcp65r46 prop. delay (s) 0 1 2 3 4 5 6 7 8 0.0 1.0 2.0 3.0 4.0 5.0 6.0 v cm (v) prop. delay (ns) t plh t phl v dd = 5.5v 100 mv over-drive mcp65r46 prop. delay (s) 0 5 10 15 20 25 1.52.53.54.55.5 v dd (v) prop. delay (ns) t phl , 10 mv over-drive t plh , 10 mv over-drive t phl , 100 mv over-drive t plh , 100 mv over-drive v cm = v dd /2 mcp65r46 prop. delay (s)
? 2010 microchip technology inc. ds22269a-page 13 mcp65r41/6 note: unless otherwise indicated, v dd = +1.8v to +5.5v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r l = 100 k ? to v dd /2 ( mcp65r41 only), r pull-up = 2.74 k ? to v dd /2 ( mcp65r46 only) and c l = 50 pf. figure 2-37: propagation delay vs. temperature. figure 2-38: propagation delay vs. capacitive load. figure 2-39: propagation delay vs. input over-drive. figure 2-40: propagation delay vs. temperature. figure 2-41: propagation delay vs. capacitive load. figure 2-42: propagation delay vs. input over-drive. 0 2 4 6 8 10 -50 -25 0 25 50 75 100 125 temperature (c) prop. delay (ns) 100 mv over-drive v cm = v dd /2 t phl , v dd = 5.5v t phl , v dd = 1.8v t plh , v dd = 5.5v t plh , v dd = 1.8v mcp65r41 prop. delay (s) 1 10 100 0.01 0.1 1 10 100 capacitive load (nf) prop. delay (s) 0.01 0.1 1 10 100 v dd = 5.5v, t plh v dd = 5.5v, t phl 100 mv over-drive v cm = v dd /2 v dd = 1.8v, t plh v dd = 1.8v, t phl mcp65r41 0 5 10 15 20 25 30 35 40 45 50 0.001 0.01 0.1 1 over-drive (mv) prop. delay (ns) t phl , v dd = 5.5v t phl , v dd = 1.8v v cm = v dd /2 t plh , v dd = 5.5v t plh , v dd = 1.8v mcp65r41 prop. delay (s) prop. delay (ns) 0 2 4 6 8 10 -50 -25 0 25 50 75 100 125 temperature (c) 100mv over-drive v cm = v dd /2 t plh , v dd = 5.5v t plh , v dd = 1.8v t phl , v dd = 5.5v t phl , v dd = 1.8v mcp65r46 prop. delay (s) 1 10 100 1000 0.01 0.1 1 10 100 capacitive load (nf) prop. delay (s) 100 mv over-drive v cm = v dd /2 v dd = 1.8v, t plh v dd = 5.5v, t plh v dd = 1.8v, t phl v dd = 5.5v, t phl mcp65r46 0 5 10 15 20 25 30 35 40 45 50 0.001 0.01 0.1 1 over-drive (mv) prop. delay (ns) t phl , v dd = 5.5v t phl , v dd = 1.8v v cm = v dd /2 t plh , v dd = 5.5v t plh , v dd = 1.8v mcp65r46 prop. delay (s)
mcp65r41/6 ds22269a-page 14 ? 2010 microchip technology inc. note: unless otherwise indicated, v dd = +1.8v to +5.5v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r l = 100 k ? to v dd /2 ( mcp65r41 only), r pull-up = 2.74 k ? to v dd /2 ( mcp65r46 only) and c l = 50 pf. figure 2-43: propagation delay skew. figure 2-44: common-mode rejection ratio and power supply rejection ratio vs. temperature. figure 2-45: common-mode rejection ratio. figure 2-46: propagation delay skew. figure 2-47: common-mode rejection ratio and power supply rejection ratio vs. temperature. figure 2-48: common-mode rejection ratio. 0% 10% 20% 30% 40% 50% 60% -1.0 -0.5 0.0 0.5 1.0 prop. delay skew (s) occurrences (%) v dd = 1.8v avg. = -0.36 s stdev = 0.07 s 850 units 100 mv over-drive v cm = v dd /2 v dd = 5.5v avg. = -0.21 s stdev = 0.07 s 850 units mcp65r41 50 55 60 65 70 75 80 85 90 -50 -25 0 25 50 75 100 125 temperature (c) cmrr/psrr (db) cmrr psrr v cm = -0.3v to v dd + 0.3v v dd = 5.5v input referred v cm = v ss v dd = 1.8v to 5.5v mcp65r41 0% 10% 20% 30% 40% -5 -4 -3 -2 -1 0 1 2 3 4 5 cmrr (mv/v) occurrences (%) v dd = 1.8v 850 units v cm = -0.3v to v dd /2 avg. = 0.5 mv/v stdev = 1.14 mv/v v cm = v dd /2 to v dd + 0.3v avg. = -0.02 mv/v stdev = 0.54 mv/v v cm = -0.3v to v dd + 0.2v avg. = 0.23 mv/v stdev = 0.68 mv/v 0% 10% 20% 30% 40% 50% 60% 70% 80% -3 -1.5 0 1.5 3 prop. delay skew (ns) occurrences (%) 100 mv over-drive v cm = v dd /2 v dd = 1.8v avg. = 1.1 s stdev = 0.11 s 850 units v dd = 5.5v avg. = 1.81 s stdev = 0.14 s 850 units mcp65r46 50 55 60 65 70 75 80 85 90 -50 -25 0 25 50 75 100 125 temperature (c) cmrr/psrr (db) v cm = -0.3v to v dd + 0.3v v dd = 5.5v input referred v cm = v ss v dd = 1.8v to 5.5v mcp65r46 psrr cmrr 0% 10% 20% 30% 40% -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 cmrr (mv/v) occurrences (%) v dd = 5.5v 850 units v cm = -0.3v to v dd /2 avg. = 0.05 mv/v stdev = 0.46 mv/v v cm = v dd /2 to v dd + 0.3v avg. = 0.02 mv/v stdev = 0.25 mv/v v cm = -0.3v to v dd + 0.3v avg. = 0.03 mv/v stdev = 0.3 mv/v
? 2010 microchip technology inc. ds22269a-page 15 mcp65r41/6 note: unless otherwise indicated, v dd = +1.8v to +5.5v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r l = 100 k ? to v dd /2 ( mcp65r41 only), r pull-up = 2.74 k ? to v dd /2 ( mcp65r46 only) and c l = 50 pf. figure 2-49: input offset current and input bias current vs. temperature. figure 2-50: input offset current and input bias current vs. common-mode input voltage vs. temperature. figure 2-51: input bias current vs. input voltage vs. temperature. figure 2-52: power supply rejection ratio. figure 2-53: v ref vs. v dd . figure 2-54: v ref vs. v dd . 0.01 0.1 1 10 100 1000 25 50 75 100 125 temperature (c) i os & i b (pa) i b |i os | 0.01 0.1 1 10 100 1000 0.0 1.0 2.0 3.0 4.0 5.0 6.0 v cm (v) i os & i b (pa) i b @ t a = +125c i b @ t a = +85c |i os | @ t a = +125c |i os | @ t a = +85c v dd = 5.5v 1e+00 1e+01 1e+02 1e+03 1e+04 1e+05 1e+06 1e+07 1e+08 1e+09 1e+10 -0.8 -0.6 -0.4 -0.2 input voltage (v) input current (a) t a = -40c t a = +125c t a = +25c t a = +85c 10p 100p 10n 100n 100 1m 10m 10 1 1n 1p 0% 5% 10% 15% 20% 25% 30% -500 -250 0 250 500 psrr (v/v) occurrences (%) v cm = v ss avg. = -127.9 v/v stdev = 99.88 v/v 3588 units 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 1.225 1.230 1.235 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 v dd (v) v ref (v) t a = -40c t a = +125c t a = +85c t a = +25c i ref = 0a 2.35 2.37 2.39 2.41 2.43 2.45 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 v dd (v) v ref (v) t a = -40c t a = +125c t a = +85c t a = +25c i ref = 0a
mcp65r41/6 ds22269a-page 16 ? 2010 microchip technology inc. note: unless otherwise indicated, v dd = +1.8v to +5.5v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r l = 100 k ? to v dd /2 ( mcp65r41 only), r pull-up = 2.74 k ? to v dd /2 ( mcp65r46 only) and c l = 50 pf. figure 2-55: v ref vs. i ref over temperature. figure 2-56: v ref vs. i ref over temperature. figure 2-57: v ref vs. i ref over temperature. figure 2-58: v ref vs. temperature. figure 2-59: v ref vs. temperature. figure 2-60: short circuit current vs. v dd . 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 1.225 1.230 1.235 -0.5 -0.3 -0.1 0.1 0.3 0.5 i ref (a) v ref (v) v dd = 1.8v t a = +85c t a = +25c t a = -40c t a = +125c 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 1.225 1.230 1.235 -0.5 -0.3 -0.1 0.1 0.3 0.5 i ref (a) v ref (v) v dd = 5.5v t a = +85c t a = +25c t a = -40c t a = +125c 2.35 2.37 2.39 2.41 2.43 2.45 -0.5 -0.3 -0.1 0.1 0.3 0.5 i ref (a) v ref (v) v dd = 5.5v t a = +85c t a = +25c t a = -40c t a = +125c 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 1.225 1.230 1.235 -50 -25 0 25 50 75 100 125 temperature (c) v dd = 1.8v temp. co. = 27ppm v dd = 5.5v temp. co. = 22ppm v ref (v) 2.35 2.37 2.39 2.41 2.43 2.45 -50 -25 0 25 50 75 100 125 temperature (c) v dd = 5.5v temp. co. = 23ppm v ref (v) -20.0 -15.0 -10.0 -5.0 0.0 5.0 10.0 15.0 20.0 1.5 2.5 3.5 4.5 5.5 v dd (v) i sc (ma) sourcing sinking v ref = 1.21v
? 2010 microchip technology inc. ds22269a-page 17 mcp65r41/6 note: unless otherwise indicated, v dd = +1.8v to +5.5v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r l = 100 k ? to v dd /2 ( mcp65r41 only), r pull-up = 2.74 k ? to v dd /2 ( mcp65r46 only) and c l = 50 pf. figure 2-61: reference voltage tolerance. figure 2-62: reference voltage tolerance. 0% 10% 20% 30% 40% 50% 2.0% 1.2% 0.4% -0.4% -1.2% -2.0% v tol (mv) occurrences (%) v dd = 5.5v v ref = 1.21v avg. = 0.02% 850 units v dd = 1.8v v ref = 1.21v avg. = 0.06% 850 units 0% 10% 20% 30% 40% 50% 2.0% 1.2% 0.4% -0.4% -1.2% -2.0% v tol (mv) occurrences (%) v dd = 5.5v v ref = 2.4v avg. = -0.22% 850 units
mcp65r41/6 ds22269a-page 18 ? 2010 microchip technology inc. notes:
? 2010 microchip technology inc. ds22269a-page 19 mcp65r41/6 3.0 pin descriptions descriptions of the pins are listed in table 3-1 . 3.1 analog inputs the comparator non-inverting and inverting inputs are high-impedance cmos inputs with low bias currents. 3.2 digital outputs the comparator outputs are cmos/ttl compatible push-pull and open-drain digital outputs. the push-pull is designed to directly interface to a cmos/ttl com- patible pin while the open-drain output is designed for level shifting and wired-or interfaces. 3.3 analog outputs the v ref output pin outputs a reference voltage of 1.21v or 2.4v. 3.4 power supply (v ss and v dd ) the positive power supply pin (v dd ) is 1.8v to 5.5v higher than the negative power supply pin (v ss ). for normal operation, the other pins are at voltages between v ss and v dd . typically, these parts are used in a single (positive) supply configuration. in this case, v ss is connected to ground and v dd is connected to the supply. v dd will need a local bypass capacitor (typically 0.01 f to 0.1f) within 2mm of the v dd pin. these can share a bulk capacitor with the nearby analog parts (within 100 mm), but it is not required. table 3-1: pin function table mcp65r41/6 symbol description sot23-6 1outdigital output 2v ss ground 3v in + non-inverting input 4v in ? inverting input 5v ref reference voltage output 6v dd positive power supply
mcp65r41/6 ds22269a-page 20 ? 2010 microchip technology inc. notes:
? 2010 microchip technology inc. ds22269a-page 21 mcp65r41/6 4.0 applications information the mcp65r41/6 family of push-pull and open-drain output comparators are fabricated on microchip?s state- of-the-art cmos process. they are suitable for a wide range of high-speed applications requiring low power consumption. 4.1 comparator inputs 4.1.1 normal operation the input stage of this family of devices uses three differential input stages in parallel: one operates at low input voltages, one at high input voltages, and one at mid input voltages. with this topology, the input voltage range is 0.3v above v dd and 0.3v below v ss , while providing low offset voltage throughout the common mode range. the input offset voltage is measured at both v ss - 0.3v and v dd + 0.3v to ensure proper operation. the mcp65r41/6 family has internally-set hysteresis v hyst that is small enough to maintain input offset accuracy, and large enough to eliminate the output chattering caused by the comparator?s own input noise voltage e ni . figure 4-1 depicts this behavior. input offset voltage (v os ) is the center (average) of the (input-referred) low-high and high-low trip points. input hysteresis voltage (v hyst ) is the difference between the same trip points. figure 4-1: the mcp65r41/6 comparators? internal hysteresis eliminates output chatter caused by input noise voltage. 4.1.2 input voltage and current limits the esd protection on the inputs can be depicted as shown in figure 4-2 . this structure was chosen to protect the input transistors, and to minimize the input bias current (i b ). the input esd diodes clamp the inputs when trying to go more than one diode drop below v ss . they also clamp any voltages that go too far above v dd ; their breakdown voltage is high enough to allow a normal operation, and low enough to bypass the esd events within the specified limits. figure 4-2: simplified analog input esd structures. in order to prevent damage and/or improper operation of these comparators, the circuit they are connected to limit the currents (and voltages) at the v in + and v in ? pins (see absolute maximum ratings? ). figure 4-3 shows the recommended approach to protect these inputs. the internal esd diodes prevent the input pins (v in + and v in ?) from going too far below ground, and the resistors r 1 and r 2 limit the possible current drawn out of the input pin. diodes d 1 and d 2 prevent the input pin (v in + and v in ?) from going too far above v dd . when implemented as shown, resistors r 1 and r 2 also limit the current through d 1 and d 2 . figure 4-3: protecting the analog inputs. -3 -2 -1 0 1 2 3 4 5 6 7 8 9 0 100 2 00 300 40 0 500 600 700 800 900 10 00 time (100 ms/div) output voltage (v) -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 input voltage (10 mv/div) v ou t v in - hysteresis v dd = 5.0v bond pad bond pad bond pad v dd v in + v ss input stage bond pad v in ? v 1 r 1 v dd d 1 r 2 ? v ss ? (minimum expected v 2 ) 2ma v out v 2 r 2 r 3 d 2 + ? r 1 ? v ss ? (minimum expected v 1 ) 2ma v pu r pu * * pull-up resistor required for the mcp65r46 only.
mcp65r41/6 ds22269a-page 22 ? 2010 microchip technology inc. it is also possible to connect the diodes to the left of the resistors r 1 and r 2 . in this case, the currents through the diodes d 1 and d 2 need to be limited by some other mechanism. the resistor then serves as an in-rush cur- rent limiter; the dc current into the input pins (v in + and v in ?) should be very small. a significant amount of current can flow out of the inputs when the common mode voltage (v cm ) is below ground (v ss ); see figure 4-3 . the applications that are high impedance may need to limit the usable voltage range. 4.1.3 phase reversal the mcp65r41/6 comparator family uses cmos tran- sistors at the input. they are designed to prevent phase inversion when the input pins exceed the supply voltages. figure 2-3 shows an input voltage exceeding both supplies with no resulting phase inversion. 4.2 push-pull output the push-pull output is designed to be compatible with cmos and ttl logic, while the output transistors are configured to give a rail-to-rail output performance. they are driven with circuitry that minimizes any switching current (shoot-through current from supply- to-supply) when the output is transitioned from high-to- low, or from low-to-high (see figures 2-18 and 2-19 for more information). 4.3 externally set hysteresis a greater flexibility in selecting the hysteresis (or the input trip points) is achieved by using external resistors. hysteresis reduces output chattering when one input is slowly moving past the other. it also helps in systems where it is best not to cycle between high and low states too frequently (e.g., air conditioner thermostatic control). output chatter also increases the dynamic supply current. 4.3.1 non-inverting circuit figure 4-4 shows a non-inverting circuit for single- supply applications using just two resistors. the resulting hysteresis diagram is shown in figure 4-5 . figure 4-4: non-inverting circuit with hysteresis for single-supply. figure 4-5: hysteresis diagram for the non-inverting circuit. the trip points for figures 4-4 and 4-5 are: example 4-1: v ref v in v out v dd r 1 r f + - v pu r pu * v ref * pull-up resistor required for the mcp65r46 only. v out high-to-low low-to-high v dd v oh v ol v ss v ss v dd v thl v tlh v in v tlh v ref 1 r 1 r f ------- + ?? ?? ?? v ol r 1 r f ------- ?? ?? ?? ? = v thl v ref 1 r 1 r f ------- + ?? ?? ?? v oh r 1 r f ------- ?? ?? ?? ? = where: v tlh = trip voltage from low to high v thl = trip voltage from high to low
? 2010 microchip technology inc. ds22269a-page 23 mcp65r41/6 4.3.2 inverting circuit figure 4-6 shows an inverting circuit for single-supply using three resistors. the resulting hysteresis diagram is shown in figure 4-7 . figure 4-6: inverting circuit with hysteresis. figure 4-7: hysteresis diagram for the inverting circuit. in order to determine the trip voltages (v thl and v tlh ) for the circuit shown in figure 4-6 , r 2 and r 3 can be simplified to the thevenin equivalent circuit with respect to v ref , as shown in figure 4-8 : figure 4-8: thevenin equivalent circuit. by using this simplified circuit, the trip voltage can be calculated using the following equation: equation 4-1: figures 2-23 and 2-26 can be used to determine the typical values for v oh and v ol . 4.4 bypass capacitors with this family of comparators, the power supply pin (v dd for single supply) should have a local bypass capacitor (i.e., 0.01 f to 0.1 f) within 2 mm for good edge rate performance. 4.5 capacitive loads 4.5.1 out pin reasonable capacitive loads (e.g., logic gates) have little impact on the propagation delay (see figure 2-34 ). the supply current increases with the increasing toggle frequency ( figure 2-22 ), especially with higher capacitive loads. the output slew rate and propagation delay performance will be reduced with higher capaci- tive loads. 4.5.2 v ref pin the reference output is designed to interface to the comparator input pins, either directly or with some resistive network, such as voltage divider network, with minimal capacitive load. the recommended capacitive load is 200 pf (typical). capacitive loads greater than 2000 pf may cause the v ref output to oscillate at power up. v in v out v dd r 2 r f r 3 v ref v pu r pu * * pull-up resistor required for the mcp65r46 only. v out high-to-low low-to-high v dd v oh v ol v ss v ss v dd v tlh v thl v in v 23 v out v dd r 23 r f + - v ss v pu r pu * * pull-up resistor required for the mcp65r46 only. where: r 23 r 2 r 3 r 2 r 3 + ------------------ - = v 23 r 3 r 2 r 3 + ------------------ -v ref ? = v thl v oh r 23 r 23 r f + ---------------------- - ?? ?? ?? v 23 r f r 23 r f + --------------------- - ?? ?? + = v tlh v ol r 23 r 23 r f + ---------------------- - ?? ?? ?? v 23 r f r 23 r f + --------------------- - ?? ?? + = where: v tlh = trip voltage from low to high v thl = trip voltage from high to low
mcp65r41/6 ds22269a-page 24 ? 2010 microchip technology inc. 4.6 pcb surface leakage in applications where the low input bias current is critical, the printed circuit board (pcb) surface leakage effects need to be considered. surface leakage is caused by humidity, dust or other type of contamination on the board. under low humidity conditions, a typical resistance between nearby traces is 10 12 ? . a 5v difference would cause 5 pa of current to flow. this is greater than the mcp65r41/6 family?s bias current at +25c (1 pa, typical). the easiest way to reduce the surface leakage is to use a guard ring around the sensitive pins (or traces). the guard ring is biased at the same voltage as the sensitive pin. an example of this type of layout is shown in figure 4-9 . figure 4-9: example guard ring layout for inverting circuit. 1. inverting configuration ( figures 4-6 and 4-9 ): a) connect the guard ring to the non-inverting input pin (v in +). this biases the guard ring to the same reference voltage as the comparator (e.g., v dd /2 or ground). b) connect the inverting pin (v in ?) to the input pad without touching the guard ring. 2. non-inverting configuration ( figure 4-4 ): a) connect the non-inverting pin (v in +) to the input pad without touching the guard ring. b) connect the guard ring to the inverting input pin (v in ?). 4.7 typical applications 4.7.1 precise comparator some applications require a higher dc precision. an easy way to solve this problem is to use an amplifier (such as the mcp6041, a 600 na low power and 14 khz bandwidth op amp) to gain-up the input signal before it reaches the comparator. figure 4-10 shows an example of this approach, which also level shifts to v pu using the open-drain option, mcp65r46. figure 4-10: precise inverting comparator. 4.7.2 bistable multi-vibrator a simple bistable multi-vibrator design is shown in figure 4-11 . v ref needs to be between ground and the maximum comparator internal v ref of 2.4v to achieve oscillation. the output duty cycle changes with v ref . figure 4-11: bistable multi-vibrator. 4.7.3 over temperature protection circuit the mcp65r41 device can be used as an over temperature protection circuit using a thermistor. the 2.4v v ref can be used as stable reference to the thermistor, the alert threshold and hysteresis threshold. this is ideal for battery powered applications, where the change in temperature and output toggle thresholds would remain fixed as battery voltage decays over time. figure 4-12: over temperature alert circuit. guard ring v ss in- in+ v ref v dd v dd r 1 r 2 v out v in v ref v pu r pu mcp65r46 mcp6041 v ref v dd r 1 r 2 r 3 v ref c 1 v out mcp65r41 v out v dd r 2 r f r 3 v ref v pu r pu * * pull-up resistor required for the mcp65r46 only. r 4 thermistor v ref v ref
? 2010 microchip technology inc. ds22269a-page 25 mcp65r41/6 5.0 packaging information 5.1 package marking information legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e 6-lead sot-23 xxnn example hv25 part number code MCP65R41T-1202E/chy hvnn mcp65r41t-2402e/chy hwnn mcp65r46t-1202e/chy hxnn mcp65r46t-2402e/chy hynn
mcp65r41/6 ds22269a-page 26 ? 2010 microchip technology inc. 6-lead plastic small outline transistor (chy) [sot-23] notes: 1. dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.127 mm per side. 2. dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units millimeters dimension limits min nom max number of pins n 6 pitch e 0.95 bsc outside lead pitch e1 1.90 bsc overall height a 0.90 C 1.45 molded package thickness a2 0.89 C 1.30 standoff a1 0.00 C 0.15 overall width e 2.20 C 3.20 molded package width e1 1.30 C 1.80 overall length d 2.70 C 3.10 foot length l 0.10 C 0.60 footprint l1 0.35 C 0.80 foot angle 0 C 30 lead thickness c 0.08 C 0.26 lead width b 0.20 C 0.51 b e 4 n e1 pin 1 id by laser mark d 1 2 3 e e1 a a1 a2 c l l1 microchip technology drawing c04-028b
? 2010 microchip technology inc. ds22269a-page 27 mcp65r41/6 6-lead plastic small outline transistor (chy) [sot-23] note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp65r41/6 ds22269a-page 28 ? 2010 microchip technology inc. notes:
? 2010 microchip technology inc. ds22269a-page 29 mcp65r41/6 appendix a: revision history revision a (december 2010) ? original release of this document.
mcp65r41/6 ds22269a-page 30 ? 2010 microchip technology inc. notes:
? 2010 microchip technology inc. ds22269a-page 31 mcp65r41/6 product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . examples: a) MCP65R41T-1202E/chy: push-pull output, 1.2vref, tape and reel, 6ld sot-23 pkg. b) mcp65r41t-2402e/chy: push-pull output, 2.4vref, tape and reel, 6ld sot-23 pkg. a) mcp65r46t-1202e/chy: open-drain output, 1.2vref, tape and reel, 6ld sot-23 pkg. b) mcp65r46t-2402e/chy: open-drain output, 2.4vref, tape and reel, 6ld sot-23 pkg. part no. x /xx package tape and device x temperature range -x x reference x x reference voltage tolerance device mcp65r41t: push-pull output comparator mcp65r46t: open-drain output comparator reference voltage 12 = 1.21v (typical) initial reference voltage 24 = 2.4v (typical) initial reference voltage reference tolerance 02 = 2% reference voltage tolerance temperature range e = -40 ? c to +125 ? c (extended) package chy = plastic small outlinetransistor, 6-lead
mcp65r41/6 ds22269a-page 32 ? 2010 microchip technology inc. notes:
? 2010 microchip technology inc. ds22269a-page 33 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mxdev, mxlab, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, appl ication maestro, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, total endurance, tsharc, uniwindriver, wiperlock and zena are trademarks of microchip tec hnology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2010, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 978-1-60932-781-1 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
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